Simple digital model-based design and implementation of carrier-based PWM for high frequency hybrid 3-L active NPC inverter

Giorgo Kapino; Alireza Kouchaki; Jesper Nielsen; Morten Nymand

doi:10.1109/CPE.2018.8372519

Simple digital model-based design and implementation of carrier-based PWM for high frequency hybrid 3-L active NPC inverter

Giorgo Kapino, Alireza Kouchaki, Jesper Nielsen, Morten Nymand

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

Abstract

In this paper, a simple digital model-based implementation of a carrier-based pulse width modulation (PWM) strategy is Prasented. The strategy is used to operate a 10 kW hybrid three-level three-phase voltage source PWM inverter (VSI). The topology of the VSI is active neutral point-clamped (ANPC). This hybrid inverter consists of silicon (Si) power MOSFETs and Gallium-Nitride (GaN) FETs. Since the Gan FETs are switching at high frequency for the power level (100 kHz for 10 kW), the PWM digital implementation has to be fast and accurate to avoid shoot-through issue in the inverter. Therefore, a field programmable gate array (FPGA) is used for that purpose. The digital model is designed using MATLAB/Simulink and Xilinx's System Generator. Finally, a 10 k W three-level three-phase hybrid ANPC is designed using two GaN-FETs and 4 Si MOSFETs for each leg. The carrier-based PWM is implemented in the FPGA of a micro-lab box from dSPACE. The experimental results show the performance of the 10 kW hybrid ANPC at 100 kHz of switching with different load conditions.

Original language	English
Title of host publication	Proceedings - 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018
Number of pages	6
Publisher	IEEE
Publication date	2018
ISBN (Print)	978-1-5386-2509-5
ISBN (Electronic)	978-1-5386-2508-8, 978-1-5386-2507-1
DOIs	https://doi.org/10.1109/CPE.2018.8372519
Publication status	Published - 2018
Event	12th IEEE International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018 - Doha, Qatar Duration: 10. Apr 2018 → 12. Apr 2018

Conference

Conference	12th IEEE International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018
Country/Territory	Qatar
City	Doha
Period	10/04/2018 → 12/04/2018
Sponsor	IEEE Industrial Electronics Society, Texas A&M University at Qatar, The Institute of Electrical and Electronics Engineers (IEEE)

Keywords

ANPC
GaN FET
Hybrid topology
Model based digital implementation
Multilevel inverter
Si MOSFET

Documents & Links

10.1109/CPE.2018.8372519

Cite this

@inproceedings{025fec9607ce4a38a57f6f874b94273f,

title = "Simple digital model-based design and implementation of carrier-based PWM for high frequency hybrid 3-L active NPC inverter",

abstract = "In this paper, a simple digital model-based implementation of a carrier-based pulse width modulation (PWM) strategy is Prasented. The strategy is used to operate a 10 kW hybrid three-level three-phase voltage source PWM inverter (VSI). The topology of the VSI is active neutral point-clamped (ANPC). This hybrid inverter consists of silicon (Si) power MOSFETs and Gallium-Nitride (GaN) FETs. Since the Gan FETs are switching at high frequency for the power level (100 kHz for 10 kW), the PWM digital implementation has to be fast and accurate to avoid shoot-through issue in the inverter. Therefore, a field programmable gate array (FPGA) is used for that purpose. The digital model is designed using MATLAB/Simulink and Xilinx's System Generator. Finally, a 10 k W three-level three-phase hybrid ANPC is designed using two GaN-FETs and 4 Si MOSFETs for each leg. The carrier-based PWM is implemented in the FPGA of a micro-lab box from dSPACE. The experimental results show the performance of the 10 kW hybrid ANPC at 100 kHz of switching with different load conditions.",

keywords = "ANPC, GaN FET, Hybrid topology, Model based digital implementation, Multilevel inverter, Si MOSFET",

author = "Giorgo Kapino and Alireza Kouchaki and Jesper Nielsen and Morten Nymand",

year = "2018",

doi = "10.1109/CPE.2018.8372519",

language = "English",

isbn = "978-1-5386-2509-5",

booktitle = "Proceedings - 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018",

publisher = "IEEE",

address = "United States",

note = "12th IEEE International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018 ; Conference date: 10-04-2018 Through 12-04-2018",

}

Kapino, G, Kouchaki, A, Nielsen, J & Nymand, M 2018, Simple digital model-based design and implementation of carrier-based PWM for high frequency hybrid 3-L active NPC inverter. in Proceedings - 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018. IEEE, 12th IEEE International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018, Doha, Qatar, 10/04/2018. https://doi.org/10.1109/CPE.2018.8372519

Simple digital model-based design and implementation of carrier-based PWM for high frequency hybrid 3-L active NPC inverter. / Kapino, Giorgo; Kouchaki, Alireza; Nielsen, Jesper ; Nymand, Morten.

Proceedings - 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018. IEEE, 2018.

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

TY - GEN

T1 - Simple digital model-based design and implementation of carrier-based PWM for high frequency hybrid 3-L active NPC inverter

AU - Kapino, Giorgo

AU - Kouchaki, Alireza

AU - Nielsen, Jesper

AU - Nymand, Morten

PY - 2018

Y1 - 2018

N2 - In this paper, a simple digital model-based implementation of a carrier-based pulse width modulation (PWM) strategy is Prasented. The strategy is used to operate a 10 kW hybrid three-level three-phase voltage source PWM inverter (VSI). The topology of the VSI is active neutral point-clamped (ANPC). This hybrid inverter consists of silicon (Si) power MOSFETs and Gallium-Nitride (GaN) FETs. Since the Gan FETs are switching at high frequency for the power level (100 kHz for 10 kW), the PWM digital implementation has to be fast and accurate to avoid shoot-through issue in the inverter. Therefore, a field programmable gate array (FPGA) is used for that purpose. The digital model is designed using MATLAB/Simulink and Xilinx's System Generator. Finally, a 10 k W three-level three-phase hybrid ANPC is designed using two GaN-FETs and 4 Si MOSFETs for each leg. The carrier-based PWM is implemented in the FPGA of a micro-lab box from dSPACE. The experimental results show the performance of the 10 kW hybrid ANPC at 100 kHz of switching with different load conditions.

AB - In this paper, a simple digital model-based implementation of a carrier-based pulse width modulation (PWM) strategy is Prasented. The strategy is used to operate a 10 kW hybrid three-level three-phase voltage source PWM inverter (VSI). The topology of the VSI is active neutral point-clamped (ANPC). This hybrid inverter consists of silicon (Si) power MOSFETs and Gallium-Nitride (GaN) FETs. Since the Gan FETs are switching at high frequency for the power level (100 kHz for 10 kW), the PWM digital implementation has to be fast and accurate to avoid shoot-through issue in the inverter. Therefore, a field programmable gate array (FPGA) is used for that purpose. The digital model is designed using MATLAB/Simulink and Xilinx's System Generator. Finally, a 10 k W three-level three-phase hybrid ANPC is designed using two GaN-FETs and 4 Si MOSFETs for each leg. The carrier-based PWM is implemented in the FPGA of a micro-lab box from dSPACE. The experimental results show the performance of the 10 kW hybrid ANPC at 100 kHz of switching with different load conditions.

KW - ANPC

KW - GaN FET

KW - Hybrid topology

KW - Model based digital implementation

KW - Multilevel inverter

KW - Si MOSFET

U2 - 10.1109/CPE.2018.8372519

DO - 10.1109/CPE.2018.8372519

M3 - Article in proceedings

AN - SCOPUS:85048886606

SN - 978-1-5386-2509-5

BT - Proceedings - 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018

PB - IEEE

T2 - 12th IEEE International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018

Y2 - 10 April 2018 through 12 April 2018

ER -

Simple digital model-based design and implementation of carrier-based PWM for high frequency hybrid 3-L active NPC inverter

Abstract

Conference

Keywords

Documents & Links

Fingerprint

Cite this