Simple digital model-based design and implementation of carrier-based PWM for high frequency hybrid 3-L active NPC inverter

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Abstract

In this paper, a simple digital model-based implementation of a carrier-based pulse width modulation (PWM) strategy is Prasented. The strategy is used to operate a 10 kW hybrid three-level three-phase voltage source PWM inverter (VSI). The topology of the VSI is active neutral point-clamped (ANPC). This hybrid inverter consists of silicon (Si) power MOSFETs and Gallium-Nitride (GaN) FETs. Since the Gan FETs are switching at high frequency for the power level (100 kHz for 10 kW), the PWM digital implementation has to be fast and accurate to avoid shoot-through issue in the inverter. Therefore, a field programmable gate array (FPGA) is used for that purpose. The digital model is designed using MATLAB/Simulink and Xilinx's System Generator. Finally, a 10 k W three-level three-phase hybrid ANPC is designed using two GaN-FETs and 4 Si MOSFETs for each leg. The carrier-based PWM is implemented in the FPGA of a micro-lab box from dSPACE. The experimental results show the performance of the 10 kW hybrid ANPC at 100 kHz of switching with different load conditions.

Original languageEnglish
Title of host publicationProceedings - 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018
Number of pages6
PublisherIEEE
Publication date2018
ISBN (Print)978-1-5386-2509-5
ISBN (Electronic)978-1-5386-2508-8, 978-1-5386-2507-1
DOIs
Publication statusPublished - 2018
Event12th IEEE International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018 - Doha, Qatar
Duration: 10. Apr 201812. Apr 2018

Conference

Conference12th IEEE International Conference on Compatibility, Power Electronics and Power Engineering, CPE-POWERENG 2018
Country/TerritoryQatar
CityDoha
Period10/04/201812/04/2018
SponsorIEEE Industrial Electronics Society, Texas A&M University at Qatar, The Institute of Electrical and Electronics Engineers (IEEE)

Keywords

  • ANPC
  • GaN FET
  • Hybrid topology
  • Model based digital implementation
  • Multilevel inverter
  • Si MOSFET

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