Overmodulation of n-level three-leg DC-AC diode-clamped converters with comprehensive capacitor voltage balance

Sergio Busquets-Monge*, Ramkrishan Maheshwari, Stig Munk-Nielsen

*Corresponding author for this work

Research output: Contribution to journalJournal articleResearchpeer-review

Abstract

This paper presents a novel pulsewidth modulation (PWM) strategy for n-level three-leg semiconductor-clamped dc-ac converters in the overmodulation region, with dc-link capacitor voltage balance in every switching cycle. The strategy is based on the virtual-vector concept. Suitable reference vector trajectories are selected to obtain low weighted total harmonic distortion and a simple algorithm. A hexagonal-boundary compression factor is introduced to guarantee, at any operating point, dc-link capacitor voltage regulation capabilities in every switching cycle and avoid narrow gate pulses. The detailed PWM algorithm for an easy implementation in a digital control platform is also presented. The good performance of the strategy is verified through both simulation and experiments in a three-level three-phase neutral-point clamped converter.

Original languageEnglish
Article number6301692
JournalIEEE Transactions on Industrial Electronics
Volume60
Issue number5
Pages (from-to)1872-1883
Number of pages12
ISSN0278-0046
DOIs
Publication statusPublished - 1. Jan 2013

Keywords

  • Capacitor voltage balance
  • diode-clamped multilevel dc-ac converter
  • overmodulation
  • space vector pulsewidth modulation (SVM)
  • three-level neutral-point-clamped converter
  • virtual vectors

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