Abstract
This paper introduces a mixed-signal pulse-width modulator which uses a low clock-frequency digital pulse-width modulator and a binary-weighted resistive divider, ramp, and comparator to generate switching signals with sub-clock-cycle accuracy. A voltage reference is set prior to a desired switching event and a compared against a ramp, generating an asynchronous gate turn-off signal. The effective resolution of the PWM is increased shifting from a time-resolution required to a voltage resolution requirement. A discrete experimental prototype is built to verify the operation of the circuit. 29 ps time resolution is achieved on FPGA without the need for a PLL.
| Original language | English |
|---|---|
| Title of host publication | International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM Europe 2024 |
| Number of pages | 6 |
| Publisher | Mesago PCIM GmbH |
| Publication date | 2024 |
| Pages | 2359-2364 |
| ISBN (Electronic) | 9783800762620 |
| Publication status | Published - 2024 |
| Event | 2024 International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM Europe 2024 - Nuremberg, Germany Duration: 11. Jun 2024 → 13. Jun 2024 |
Conference
| Conference | 2024 International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, PCIM Europe 2024 |
|---|---|
| Country/Territory | Germany |
| City | Nuremberg |
| Period | 11/06/2024 → 13/06/2024 |
| Series | PCIM Europe Conference Proceedings |
|---|---|
| Volume | 2024-June |
| ISSN | 2191-3358 |
Bibliographical note
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