A Novel Carrier-Based Hybrid PWM Technique for Minimization of Line Current Ripple in Two Parallel Interleaved Two-Level VSIs

Kapil Shukla, Varun Malyala, Ramkrishan Maheshwari

Research output: Contribution to journalJournal article

Abstract

A novel hybrid pulse width modulation (PWM) technique is proposed in this paper for two parallel interleaved, two-level, three-phase voltage source inverters (VSIs). The two parallel interleaved VSIs are analyzed as a three-level (3L) inverter. A 3L inverter provides minimum line current ripple when nearest three voltage vectors are applied. In this paper, a novel carrier-based PWM technique is developed that ensures the application of nearest voltage vectors, keeping average circulating current to zero over a switching period. For carrier-based implementation of the proposed PWM, generalized common-mode (CM) offsets are derived in terms of maximum and minimum values of reference signals. Each 3L space-vector sector is divided into seven subsectors. For each subsector, a CM offset is calculated, addition of which to reference signals ensures the minimum line current ripple and zero average circulating current. Simulation and experimental results are provided to validate the proposed technique.

Original languageEnglish
JournalIEEE Transactions on Industrial Electronics
Volume65
Issue number3
Pages (from-to)1908-1918
ISSN0278-0046
DOIs
Publication statusPublished - Mar 2018
Externally publishedYes

Keywords

  • Interleaving
  • pulse width modulation (PWM)
  • two-level inverter (2L)
  • voltage source inverter (VSI)

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