A new hybrid PWM for two parallel connected interleaved two-level inverter to reduce output current ripple

M. Varun, Kapil Shukla, Ramkrishan Maheshwari, Amit Kumar Jain

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Abstract

This paper proposes a new hybrid carrier-based PWM technique for parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) analyzed as a single 3L inverter for line current ripple reduction. The carriers are interleaved to reduce the load side harmonics. However, this allows circulating current to flow between the VSIs. Using the proposed PWM technique, the circulating current is also kept lower than the conventional sinusoidal (SPWM) and space-vector PWM (SVPWM) techniques. Simulation and experimental results justifies the aforementioned statements.

Original languageEnglish
Title of host publication2017 IEEE 7th International Conference on Power and Energy Systems, ICPES 2017
Number of pages6
PublisherIEEE
Publication date15. Dec 2017
Pages74-79
ISBN (Electronic)9781538624289
DOIs
Publication statusPublished - 15. Dec 2017
Externally publishedYes
Event7th IEEE International Conference on Power and Energy Systems, ICPES 2017 - Toronto, Canada
Duration: 1. Nov 20173. Nov 2017

Conference

Conference7th IEEE International Conference on Power and Energy Systems, ICPES 2017
Country/TerritoryCanada
CityToronto
Period01/11/201703/11/2017
Series2017 IEEE 7th International Conference on Power and Energy Systems, ICPES 2017
Volume2017-December

Keywords

  • Interleaving
  • Pulse-width modulation (PWM)
  • Two-level inverter (2L)
  • Voltage-source inverter (VSI)

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