High Resolution Mixed-Signal Pulse Width Modulator for High-Frequency DC-DC Converters

This paper introduces a mixed-signal pulse-width modulator which uses a low clock-frequency digital pulse-width modulator and a binary-weighted resistive divider, ramp, and comparator to generate switching signals with sub-clock-cycle accuracy. A voltage reference is set prior to a desired switching event and a compared against a ramp, generating an asynchronous gate turn-off signal. The effective resolution of the PWM is increased shifting from a time-resolution required to a voltage resolution requirement. A discrete experimental prototype is built to verify the operation of the circuit. 29 ps time resolution is achieved on FPGA without the need for a PLL.