TY - JOUR
T1 - Design Procedure and Efficiency Analysis of a 99.3% Efficient 10 kW Three-Phase Three-Level Hybrid GaN/Si Active Neutral Point Clamped Converter
AU - Najjar, Mohammad
AU - Kouchaki, Alireza
AU - Nielsen, Jesper
AU - Lazar, Radu
AU - Nymand, Morten
N1 - Publisher Copyright:
IEEE
PY - 2022/6
Y1 - 2022/6
N2 - High-efficient and power-dense ac/dc power electronic converters are demanded for a wide range of applications such as motor drives and active rectifiers. The utilization of wide bandgap (WBG) devices, such as gallium-nitride (GaN) transistors, is a key feature to improve both the efficiency and the power density of power electronic converters. Owing to the superiority of GaN switches, this paper achieves a high efficiency three-level active-neutral-point-clamped (ANPC) converter. However, using GaN transistors is critically dependent on the layout configuration to achieve smooth switching transient and, as equally important, efficient cooling. Therefore, this paper presents layout optimization and considers different layout configurations to achieve a low power loop inductance and as efficient heatsink assembly/performance. Two configurations of the switch boards are built by GaN/Si MOSFETs, and a power loop inductance comparison is presented. Furthermore, a comprehensive loss model is performed to fine-tune the switching frequency from the efficiency and the size point of view. A 10kW laboratory prototype voltage source converter, including an EMI filter, is built with the switching frequency of 140kHz. The efficiency measurement is performed and confirmed the full load efficiency of 99% and peak efficiency of 99.34%. Moreover, the CISPR11 Class A conducted EMI standard is fulfilled.
AB - High-efficient and power-dense ac/dc power electronic converters are demanded for a wide range of applications such as motor drives and active rectifiers. The utilization of wide bandgap (WBG) devices, such as gallium-nitride (GaN) transistors, is a key feature to improve both the efficiency and the power density of power electronic converters. Owing to the superiority of GaN switches, this paper achieves a high efficiency three-level active-neutral-point-clamped (ANPC) converter. However, using GaN transistors is critically dependent on the layout configuration to achieve smooth switching transient and, as equally important, efficient cooling. Therefore, this paper presents layout optimization and considers different layout configurations to achieve a low power loop inductance and as efficient heatsink assembly/performance. Two configurations of the switch boards are built by GaN/Si MOSFETs, and a power loop inductance comparison is presented. Furthermore, a comprehensive loss model is performed to fine-tune the switching frequency from the efficiency and the size point of view. A 10kW laboratory prototype voltage source converter, including an EMI filter, is built with the switching frequency of 140kHz. The efficiency measurement is performed and confirmed the full load efficiency of 99% and peak efficiency of 99.34%. Moreover, the CISPR11 Class A conducted EMI standard is fulfilled.
KW - Active neutral point clamped (ANPC)
KW - Capacitors
KW - Efficiency
KW - Electromagnetic interference
KW - EMI filter
KW - Modulation
KW - Multilevel converter
KW - Power harmonic filters
KW - Power-factor correction (PFC)
KW - Switches
KW - Switching frequency
KW - Switching loss
KW - Volume minimization
KW - efficiency
KW - volume minimization
KW - multilevel converter
KW - power-factor correction (PFC)
KW - electromagnetic interference (EMI) filter
U2 - 10.1109/TPEL.2021.3131955
DO - 10.1109/TPEL.2021.3131955
M3 - Journal article
AN - SCOPUS:85120579963
SN - 0885-8993
VL - 37
SP - 6698
EP - 6710
JO - IEEE Transactions on Power Electronics
JF - IEEE Transactions on Power Electronics
IS - 6
ER -